Yuda Fan
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Master Student Direct Doctorate Student Department of Informatik ETH Zürich |
About Me
I am a staff engineer of the AI Infra team, Rednote Hilab, leading algo-infra codesign. Particularly, I am working on:
Hardware-friendly techniques to improve inference throughput and latency: quantization, speculative decoding, sparse attention, and etc.
From 2024 to 2026, I was working as a senior engineer at Hong Kong Research Center, expertising at LLM inference, high performance computing, and heterogeous computing.
Prior to this, I was a quantative developer at Citadel Securities, working at high frequency trading systems, especially in exchange arbitrage.
I have more than five years of professional experience in high performance computing and distributed systems in heterogeneous devices, including Kirin Armv8 CPU, Intel x86 AVX512 CPU, Nvidia GPU, Ascend NPU, AMD Alveo FPGA and Habana HPU. I code with English(codex), Intrinsics, Assembly, and RTL.
I graduated from ETH Zürich with distiction in 2024. I obtained my Bechelor's degree with honor from ACM Honor Class, SJTU.
If you are interested in my educational background and research experience, please refer to my [CV](out-of-date, circa 2024) to get detail information.
For recruiters and hiring managers, I kindly invite you to take a look at this [resume] which highlights my working skills.